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| Volume-II,
Issue-IV, October-December 2013 |
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| Research
Scapes (An International Multi Disciplinary Journal) |
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Survey on High speed folding
and Interpolation ADC Amplifier in CMOS Technology
Baghel R. K. and Soni B.B. NRI Institute of Information
Science & Technology, Bhopal, MP, India CLICK
HERE TO ABSTRACT
Folding
and interpolation ADC has been shown to be an
important means of digitization of high BW
signals at intermediate resolution. The objective
of this paper is to design and identify the
performance of
the ADC. Flash ADC is one of the faster ways
to convert any analog signal to a digital signal.
It uses folding
and interpolating techniques allow each comparator
of the ADC to be reused several times over the
full
scale input range. In addition interpolating
technique can reduce the number of folding circuit
required in a
folding ADC hence further improve the performance
of the ADC in term of capacitive loading and
power
consumption.
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